| Firmware Inventory | ||||||||
| Board | Chip Designation | Chip Type | Software required for re-build | Current Firmware developer | Institution | Source code is stored | ||
| CFEB | Control FPGA | xilinx xcv50-pq240-4c | MentorGraphics Dxdesigner & Xilinx ISE | Jianhui Gu | Ohio State U | Laptop, with backup in USB disks (several copies) | ||
| DMB | VME FPGA | Xilinx XC2s200-FG456-5c | MentorGraphics Dxdesigner & Xilinx ISE | Jianhui Gu | Ohio State U | Laptop, with backup in USB disks (several copies) | ||
| DMB | Control FPGA | Xilinix XC2V500-FG456-4 | MentorGraphics Dxdesigner & Xilinx ISE | Jianhui Gu | Ohio State U | Laptop, with backup in USB disks (several copies) | ||
| DCC | Input FPGA | Xilinx XC2VP2-FF672-6c | MentorGraphics Dxdesigner & Xilinx ISE | Jianhui Gu | Ohio State U | Laptop, with backup in USB disks (several copies) | ||
| DCC | Main FPGA | Xilinx XC2VP20-FF896-5c | MentorGraphics Dxdesigner & Xilinx ISE | Jianhui Gu | Ohio State U | Laptop, with backup in USB disks (several copies) | ||
| VCC | Main FPGA | Xilinx XC2VP20-FF896-5c | Xilinx ISE | Ben Bylsma | Ohio State U | Laptop, 2 desktops, and zipped version on web server. Plans for storing in CMS firmware repository. | ||
| DDU | Input Control FPGA | Xilinx XC2VP20-6FG676c | MentorGraphics Dxdesigner & Xilinx ISE | Jiason Gilmore | Ohio State U | departmental server with regular backups | ||
| DDU | DDU Control FPGA | Xilinx XC2VP7-6FF672c | MentorGraphics Dxdesigner & Xilinx ISE | Jiason Gilmore | Ohio State U | departmental server with regular backups | ||
| DDU | VME Control FPGA | Xilinx XC2V500-5FG456c | MentorGraphics Dxdesigner & Xilinx ISE | Jiason Gilmore | Ohio State U | departmental server with regular backups | ||
| Clock and Control Board (CCB2004) | Main FPGA | XC2V250-FG456-4C | Xilinx ISE 6.2.03i | Mikhail Matveev | Rice University | Source code and downloading files (mcs and svf)are stored at developer's laptop, CD (at Rice U)and website http://bonner-ntserver.rice.edu/cms | ||
| Muon Port Card (MPC2004) | Main FPGA | XCV600E-FG680-8C | Xilinx ISE 6.2.03i | Mikhail Matveev | Rice University | Source code and downloading files (mcs and svf)are stored at developer's laptop, CD (at Rice U)and website http://bonner-ntserver.rice.edu/cms | ||
| Muon Sorter (MS2005) | Main FPGA | XC2V4000-FF1152-5C | Xilinx ISE 6.2.03i | Mikhail Matveev | Rice University | Source code and downloading files (mcs and svf)are stored at developer's laptop, CD (at Rice U)and website http://bonner-ntserver.rice.edu/cms | ||
| Muon Sorter (MS2005) | VME Interface PLD | XCR3128XL-TQ144 | Xilinx ISE 6.2.03i | Mikhail Matveev | Rice University | Source code and downloading files (mcs and svf)are stored at developer's laptop, CD (at Rice U)and website http://bonner-ntserver.rice.edu/cms | ||
| ALCT | ||||||||
| TMB | ||||||||
| RAT | ||||||||
| UF HV | ||||||||
| LVDB | ||||||||